Asic/Soc Design Verification Engineer - This role is responsible for end-to-end pre-silicon verification activities, covering system-level verification planningthrough tape-out and post-silicon support. The position focuses on digital power IP verification using advancedverification methodologies including SystemVerilog UVM, coverage-driven verification, assertion-based verification,formal verification, and UPF power-aware verification flows. The successful candidate will work closely with desi…